Boxborough -MA - Senior ST / Verification Engineer - Ref: 940009

Job description

Job Description: IP level functional verification


Verification of a complex bridge IP using an equally complex SV/UVM verification


Development of directed and random verification tests to validate IP/chip function

Development and analysis of functional coverage

Development of verification components and tools

Regression debug

Replicate functional issues found in external environments or post-silicon

Required competence


5 or more years of proven verification experience on large ASIC development projects in a hardware development setting.

Strong background in System Verilog and UVM methodologies is a must.

Strong debug skills and experience with debug tools such as DVE/Verdi.

Proficient in Object Oriented programming, computer architecture and data structures.Knowledge of scripting languages, such as Perl or Ruby

Strong analytical/problem solving skills and pronounced attention to details.

Strong interpersonal and communication skills

Must be comfortable working across geographies

On site only "no remote"

Place of assignment

Boxborough -MA

Assignment duration

Start: 2019-09-16
End: 2019-12-31

If this sounds interesting, please send your CV (in MS Word) and some lines on how you meet the requirements and will contribute to this position, as soon as possible, no later than 2019-12-31.

Contact person

Paul Barone
+1 214 402 8682


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